The present invention relates generally to signal acquisition systems using phase-locked loops as tracking filters, and specifically to a system for acquiring phase lock from large frequency errors using digital and analog circuitry to provide fast acquisition without the need of calibrating the voltage controlled oscillator.
Modern signal acquisition systems use phase-locked loops as tracking filters. A practical problem of these loops is the acquisition of phase lock since the phase-lock bandwidth is much less then the tuning range of the voltage controlled oscillator. The problem is compounded when frequency errors occur and the received signal is not at the expected frequency or varies with time.
In both radar and communications, a variety of causes can account for the frequency errors of returned signals. For example, frequency shifts can be caused by the Doppler effect depending upon the relative velocities of the receiver and the signal source. Background noise or changes in the frequency characteristics of crystal oscillators can account for other sources of frequency error.
The task of acquiring a received signal and staying "locked on" to that signal has been alleviated to some degree by the prior art techniques given by the following patents: U.S. Pat. No. 4,354,277 issued to Crackel et al on Oct. 12, 1982; U.S. Pat. No. 4,374,438 issued to Crowley on Feb. 15, 1983; U.S. Pat. No. 3,859,599 issued to Peil on Jan. 7, 1975; U.S. Pat. No. 3,795,870 issued to Sanders on Mar. 5, 1974; U.S. Pat. No. 3,346,814 issued to Haggai on Oct. 10, 1967; and U.S. Pat. No. 3,421,105 issued to Taylor on Jan. 7, 1969.
All of the above disclosures involve the use of phase-lock loops working in combination with a voltage controlled oscillator. For example, Crackel et al disclose a frequency tracking feedback circuit for acquiring a communication carrier signal from a relatively noisy environment. The patented circuit includes a digital phase-frequency detector, a limiter, a mixer, and a voltage controlled oscillator connected in a control loop. Included in the patent is an arrangement for detecting when the desired signal has been acquired, so that control may be switched from the frequency tracking loop of the patent to another control system, such as a conventional phase-locked loop.
The approach in Crackel et al is typical in the techniques disclosed in the other prior art, which may be summarized as follows:
A digital frequency and phase lock loop is taught by Crowley. In Peil a phase/frequency control network permits the combination of a large capture bandwidth with accurate narrow band turning after "lock in". Sanders uses a frequency-phase detector in a phase lock loop system to speed up loop lock. This is accomplished in the patent by enabling a variable high gain amplifier during off lock to substantially increase the output level of the phase detector to the VCO tuning circuitry. Haggai discloses dual loop control and Taylor operates a frequency tracking system in both an acquisition mode and a tracking mode.
All the cited prior art techniques quite properly emphasize the use of phase lock loops in combination with a voltage controlled oscillator to acquire and stay "locked-on" the reference frequency of an incoming signal. However, the dependance of these techniques on a phase lock loop retains a technical difficulty: generally, the bandwidth of phase-lock loop is always much less than the tuning range of the voltage controlled oscillator.
One solution to the technical problem is the calibration of the tuning curve of the voltage controlled oscillator. After a calibration, the VCO can always be positioned within a loop bandwidth of the reference frequency which ensures phase-lock. This technique gives fastest possible acquisition. A distinct disadvantage of the technique is that the circuitry required for calibration can be as complex as the loop. Also, dedicated system time is required for calibration. For this reason the calibration solution is less than satisfactory.
In view of the foregoing discussion it is apparent that there currently exists the need for a system for acquiring phase lock with small acquisition times depending upon frequency errors and loop bandwidths. The present invention is directed towards satisfying that need.